Index: c/src/lib/libbsp/m68k/mrm332/console/console.c =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/console/console.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -r1.1.1.1 -r1.2 --- c/src/lib/libbsp/m68k/mrm332/console/console.c 2003/02/25 03:33:26 1.1.1.1 +++ c/src/lib/libbsp/m68k/mrm332/console/console.c 2003/03/24 03:54:55 1.2 @@ -50,7 +50,7 @@ /* SCI internal uart */ - status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( TRUE ) ); + status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( FALSE ) ); return status; } Index: c/src/lib/libbsp/m68k/mrm332/console/sci.c =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/console/sci.c,v retrieving revision 1.1.1.2 retrieving revision 1.5 diff -u -r1.1.1.2 -r1.5 --- c/src/lib/libbsp/m68k/mrm332/console/sci.c 2003/02/25 04:00:20 1.1.1.2 +++ c/src/lib/libbsp/m68k/mrm332/console/sci.c 2003/03/24 03:54:55 1.5 @@ -412,7 +412,7 @@ // see if it was a transmit interrupt - if ( (*SCSR) & SCI_XMTR_AVAILABLE ) // data reg empty, xmt complete + if ( ( *SCCR1 & SCI_ENABLE_INT_TX ) && ( (*SCSR) & SCI_XMTR_AVAILABLE ) ) // data reg empty, xmt complete { SciDisableTransmitInterrupts(); @@ -612,20 +612,25 @@ // SciSetBaud(115200); // set the baud rate // SciSetBaud( 57600); // set the baud rate // SciSetBaud( 38400); // set the baud rate -SciSetBaud( 19200); // set the baud rate -// SciSetBaud( 9600); // set the baud rate +// SciSetBaud( 19200); // set the baud rate + SciSetBaud( 9600); // set the baud rate SciSetParity(SCI_PARITY_NONE); // set parity to none SciSetDataBits(SCI_8_DATA_BITS); // set data bits to 8 - // Install our interrupt handler into RTEMS, where does 66 come from? - - rtems_interrupt_catch( SciIsr, 66, &old_vector ); - - *QIVR = 66; - *QIVR &= 0xf8; + // Install our interrupt handler into RTEMS. + // 68 is an unused user-defined vector. Note that the vector must be + // even - it sets the low bit for SPI interrupts, and clears it for + // SCI interrupts. Also note that vector 66 is used by CPU32bug on + // the mrm332. + + rtems_interrupt_catch( SciIsr, 68, &old_vector ); + + *QSMCR = (*QSMCR & ~IARB) | 1; // Is 1 a good value for qsm iarb? + *QIVR = 68; + *QILR &= 0xf8; *QILR |= 0x06 & 0x07; SciEnableTransmitter(); // enable the transmitter @@ -847,8 +852,8 @@ // SciSetBaud(115200); // set the baud rate // SciSetBaud( 57600); // set the baud rate // SciSetBaud( 38400); // set the baud rate - SciSetBaud( 19200); // set the baud rate -// SciSetBaud( 9600); // set the baud rate +// SciSetBaud( 19200); // set the baud rate + SciSetBaud( 9600); // set the baud rate SciSetParity(SCI_PARITY_NONE); // set no parity @@ -1464,7 +1469,7 @@ { // poll the fifo, waiting for room for another character - while ( ( *SCSR & SCI_XMTR_AVAILABLE ) == 0 ) + while ( ( *SCSR & SCI_XMTR_AVAILABLE ) != SCI_XMTR_AVAILABLE ) { /* Either we are writing to the fifo faster than * the uart can clock bytes out onto the cable, Index: c/src/lib/libbsp/m68k/mrm332/include/mrm332.h =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h,v retrieving revision 1.1.1.2 retrieving revision 1.5 diff -u -r1.1.1.2 -r1.5 --- c/src/lib/libbsp/m68k/mrm332/include/mrm332.h 2003/02/25 04:00:20 1.1.1.2 +++ c/src/lib/libbsp/m68k/mrm332/include/mrm332.h 2003/03/20 23:29:59 1.5 @@ -40,18 +40,19 @@ #define MRM_Y 0x3f #endif -#if 1 +#if 0 /* 16.77722 MHz: */ #define MRM_W 1 /* system clock parameters */ #define MRM_X 1 #define MRM_Y 0x0f #endif -#if 0 +#if 1 /* 25.16582 MHz: */ #define MRM_W 1 /* system clock parameters */ #define MRM_X 1 #define MRM_Y 0x17 +#define SET_EDIV #endif #define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X))) Index: c/src/lib/libbsp/m68k/mrm332/startup/Makefile.am =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/startup/Makefile.am,v retrieving revision 1.1.1.2 retrieving revision 1.4 diff -u -r1.1.1.2 -r1.4 --- c/src/lib/libbsp/m68k/mrm332/startup/Makefile.am 2003/02/25 04:00:21 1.1.1.2 +++ c/src/lib/libbsp/m68k/mrm332/startup/Makefile.am 2003/03/19 01:09:44 1.4 @@ -29,7 +29,8 @@ $(PGM): $(OBJS) $(make-rel) -bsplib_DATA = linkcmds linkcmds_ROM +bsplib_DATA = linkcmds linkcmds_ROM \ + $(PROJECT_RELEASE)/lib/except_vect_332_ROM$(LIB_VARIANT).$(OBJEXT) $(PROJECT_RELEASE)/lib/linkcmds: linkcmds $(INSTALL_DATA) $< $@ @@ -38,8 +39,8 @@ $(INSTALL_DATA) $< $@ $(PROJECT_RELEASE)/lib/except_vect_332_ROM$(LIB_VARIANT).$(OBJEXT): \ - $(ARCH)/except_vect_332_ROM.$(OBJEXT) - $(INSTALL_DATA) $< $@ + $(ARCH) $(ARCH)/except_vect_332_ROM.$(OBJEXT) + $(INSTALL_DATA) $(ARCH)/except_vect_332_ROM.$(OBJEXT) $@ # the .rel file built here will be put into libbsp.a by ../wrapup/Makefile TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds \ Index: c/src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM,v retrieving revision 1.1.1.2 retrieving revision 1.3 diff -u -r1.1.1.2 -r1.3 --- c/src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM 2003/02/25 04:00:21 1.1.1.2 +++ c/src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM 2003/02/25 04:19:29 1.3 @@ -145,6 +145,12 @@ __DTOR_END__ = .; *(.lit) *(.shdata) + . = ALIGN (16); + *(.eh_frame) + . = ALIGN (16); + _rodata_start = .; + *(.rodata*) + *(.gnu.linkonce.r*) _etext = .; _endtext = .; } > rom Index: c/src/lib/libbsp/m68k/mrm332/startup/start_c.c =================================================================== RCS file: /cvs/rtems-src/c/src/lib/libbsp/m68k/mrm332/startup/start_c.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -r1.1.1.1 -r1.2 --- c/src/lib/libbsp/m68k/mrm332/startup/start_c.c 2003/02/25 03:33:27 1.1.1.1 +++ c/src/lib/libbsp/m68k/mrm332/startup/start_c.c 2003/03/20 23:29:59 1.2 @@ -22,15 +22,23 @@ void start_c() { +#ifdef SET_EDIV +#define OPTIONAL_EDIV EDIV +#else +#define OPTIONAL_EDIV 0 +#endif + /* Synthesizer Control Register */ /* see section(s) 4.8 */ /* end include in ram_init.S */ *SYNCR = (unsigned short int) - ( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) ); + ( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) | + OPTIONAL_EDIV ); while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */ /* include in ram_init.S */ *SYNCR = (unsigned short int) - ( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) ); + ( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) | + OPTIONAL_EDIV ); /* System Protection Control Register */ /* !!! can only write to once after reset !!! */